Traffic controller load relay control circuit



Sept. 26, 1967 5 HENDRICKS TRAFFIC CONTROLLE R LOAD REI-Ai' CONTROL CIRCUIT.

Filed May 12, 1965 3 Sheets-Sheet l;

Wm. W.

- INVENTOR GEORGE DONALD HENDRICKS BY m a/sw,

ATTORNEYS p 26, 1967 G. D. HENDRICKS 3,344,398

TRAFFIC CONTROLLER LOAD RELAY CONTROL CIRCUIT Filed May 12, 1965 3 Sheets-Sheet 2 FIG. 2

I NVENTOR.

' FROM AN OBY ATTORNEYS OUTPUT CIRCUIT OF EEORGE DONALD ueuomcxs Sept. 26, 1967 I G. D. HENDRICKS 3 3 v TRAFFIC CONTROLLER LOAD RELAY CONTROL CIRCUIT- Filed May 12, 1965 5 Shets-Sheet s' TIME u I V 3 FIG. 3A

26 0 f. -l O TIME- FIG. 38

V m 38 2 f 'j g TIME 7' FIG. 3C

g '52 E g I TIME FIG. 3D

3 v I a 3 I TIME F 12 INVENTOR. '3 GEORGE DONALD HENDRICKS O V I ATTORNEYS 3E BY WWW/30,

United States Patent 3,344,398 TRAFFIC CONTROLLER LOAD RELAY CONTROL CIRCUIT George Donald Hendricks, Campbell Island, 111., assignor to E. W. Bliss Company, Canton, Ohio, a corporation of Delaware Filed May 12, 1965, Ser. No. 455,063 5 Claims. (Cl. 340-41) This invention is directed toward a traflic controller and, more particularly, to a traffic controller having an improved load relay control circuit.

Generally, traflic signal lamps are periodically energized by alternating current from an alternating current voltage supply source, such as 115 volt line voltage, through a pair of relay contacts which are closed so long as an associated load relay coil is energized. The load relay coil is normally located in the anode circuit of a thyratron tube having its anode to cathode circuit connected across the alternating current voltage supply source through the load relay coil. During each traflic signal cycle of operation, each signal lamp will become energized by application of a trigger potential to the grid of the thyratron tube. When current commences to flow through the anode to cathode circuit of the tube, the load relay coil will become energized causing the load relay contacts to switch to their closed position to energize the signal lamp. Since a thyratron tube will conduct current only during the positive half cycle of alternating current voltage applied to its anode with respect to its cathode, it follows that the relay contacts 'will switch to their closed position only during the same positive half cycle of the alternating current voltage source that the thyratron tube commences conduction.

The period of a trafiic signal cycle is on the order of 60 seconds. Thus, each traific signal lamp controlled by a traflic controller will become energized as often as 60 times an hour, or 1,440 times a 24 hour work day for a total of 526,600 times a year. When a pair of load relay contacts periodically and consistently switched during the same half cycle or polarity of an alternating current voltage source, contact material will be transferred from one contact to the other. This transfer of contact material is known as contact migration or pitting since an excessive buildup or migration of contact material occurs on one contact while pitting of contact material occurs on the other contact. Continuous contact material migration and pitting will, if not arrested, eventually prevent the contacts from closing and opening correctly. If the load r'elay contacts for a trafiic signal lamp do not operate properly and, for example, become frozen in their closed position, the signal lamp will not operate properly resulting in an undesired disruption of traffic flow.

The present invention is directed toward a traflic controller having an improved load relay control circuit by which the load relay contacts may be switched at random with respect to the alternating current voltage source, i.e., during either the positive or negative half cycle of an alternating current voltage source, thereby eliminating migration and pitting of contact material encountered with previous load relay control circuits.

The present invention contemplates a trafiic controller including an electronic control device, such as a thyratron tube or silicon controlled rectifier, having an input circuit connected to a source of forward biasing signals,

and an output circuit connected across an alteranting current voltage source through a load relay coil, and a pair of load relay contacts operated by the coil and also connected to the alternating current voltage source through a load, such as a signal lamp.

In accordance with the invention, the alternating current voltage from the voltage source which is applied to the relay coil and thence to the electronic control device is fully rectified and of positive polarity so that the device will commence conduction whether the forward biasing signal applied to its input circuit occurs during the positive or negative half cycle or alternation of the voltage source, whereby the load relay contacts may switch during either half cycle to eliminate migration and pitting of contact material.

In accordance with another and preferred aspect of the present invention, the trafiic controller takes the form of static, logic control elements including one memory unit and one timing unit for controlling the operation of each main street and cross street go and caution signal lamps.

The principal object of the present invention is to provide an improved load relay control circuit for use with a static, logic element traffic controller.

Another object of the present invention is to provide an improved load relay control circuit to eliminate migration and pitting of load relay contacts.

The invention may take physical form in certain parts and arrangement of parts, a preferred embodiment of which will be described in detail in the specification and illustrated in the accompanying drawings which are a part hereof, and wherein:

FIGURE 1 is a block diagram of a two phase trafiic controller employing static logic elements;

FIGURE 2 is a schematic circuit diagram of a load relay control circuit according to the present invention; and

FIGURES 3A, 3B, 3C, 3D, and 3B show graphical waveforms of voltage versus time illustrating the operation of the circuit shown in FIGURE 2. 1

Referring now to the drawings wherein the showings are for the purpose of illustrating a preferred embodiment of the invention only, and not for the purpose of limiting same, FIGURE 1 illustrates a two phase, pretimed traffic controller for controlling the time during each traffic signal cycle of operation that traffic intervals .are displayed by a main street go signal MSG, a main street caution signal MSC, a cross street go signal CSG, and a cross street caution signal CSC, and is comprised generally of four substantially identical memory'rnodules MMl, MM2, MM3 and MM4; four substantially identical timer modules TM1, TMZ, TM3 and TM4; and, four substantially identical load relay driver modules DMl, DMZ,

DM3 and DM4. Preferably, each of the modules MMI through MM4,, TM1 through TM4 and DM1 through DM4, is a transistor logic circuit adapted to be plugged into a printed circuit card. Whereas the invention is described With reference to a two phase, pretimed trafiic controller, it is not limited to same and may be used with relay driver module DM1 through DM4 includes one OR circuit and an electronic control device such as a silicon controlled rectifier. To facilitate the understanding of this invention, each of these circuits is briefly explained below.

NOR CIRCUIT. This is a single stage gate having two or more input circuits and one output circuit. A positive output potential signal, known as a 1 signal, will be present at its output circuit so long as all of its input circuits receive a ground potential signal, known as a signal. If any of its input circuits receive a 1 signal, a 0 signal will be present at its output circuit.

0R CIRCUIT. This is a single stage gate having two or more input circuits and one output circuit. A 1 output signal will be present at its output circuit so long as a 1 input signal is present at one of its input circuits.

TIMER CIRCUIT. This is a static element timing circuit having an input circuit and an output circuit. A 1 output signal is present at its output circuit a predetermined time after a 1 input signal is received at its input circuit.

Timer modules TM1 through TM4 are respectively used to time the traffic intervals displayed by traflic signals MSG, MSC, CSG and CSC. Each timer module TM1 through TM4 is preceded and followed by a memory module MM1 through MM4. The output circuits of memory modules MM1 through MM4 are connected to signals MSG, MSC, CSG and CSC through relay driver modules DM1 through DM4, respectively. The memory modules MM1 through MM4 are substantially identical, the relay driver modules DM1 through DM4 are substantially identical, and timer modules TM1 through TM4 are substantially identical and, accordingly, only memory module MM1, relay driver module DM1, and timer module TM1 will be described hereinafter in detail, it being understood that the description applies equally to memory modules MM2 through MM4, relay driver modules DMZ through DM4, and timer modules TM2 through TM4.

Memory module MM1 includes two resistor transistor logic NOR circuits and 12, each having a plurality of input circuits and a plurality of output circuits. The input circuits of NOR circuit 10 and the output circuits of NOR circuit 12 will hereinafter be respectively referred to as the input and output circuits of memory module MM1, and the output circuits of NOR circuit 10 and the input circuits of NOR circuit 12 will hereinafter be respectively referred to as the inverse output and inverse input circuits of memory module MM1. One of the output circuits of memory module MM1 is connected to the main street go signal MSG through relay driver module DM1, another output circuit of memory module MM1 is connected internally of the module from the output circuit of NOR circuit 12 to the input circuit of NOR circuit 10 to provide a bistable multivibrator circuit, and another output circuit of memory module MM1 is connected to an inverse input circuit of memory module MM4. One of the input circuits of memory module MM1 is connected to a B-{- voltage supply source through a normally open, manually operable switch S1 and another input circuit is connected to the output circuit of timer module TM4. One of the inverse output circuits of NOR circuit 10 of memory module MM1 is connected internally of the module to an inverse input circuit of NOR circuit 12, and another inverse output circuit is connected to an input circuit of timer module TM1. The other inverse input circuit of memory module MM1 is connected to an output circuit of memory module MM2. During operation of memory module MM1 a continuous 1 output signal will be present at its output circuits, and a ground potential signal, known as a 0 signal, will be present at its inverse output circuits after a momentary application of a 1 signal to any of its input circuits.

Relay driver module DM1, described in greater detail hereinafter with reference to FIGURE 2, includes an OR circuit followed by a trigger switch in the form of an electronic control device, such a thyratron tube or prefer- 4 ably, as illustrated in FIGURE 2, a silicon controlled rectifier. When a 1 signal is applied from an output circuit of memory module MM1 to relay driver module DM1, the trigger switch within driver module DM1 will become activated to cause energization of signal MSG.

Timer module TM1 includes a resistor transistor logic NOR circuit 14 and a unijunction transistor relaxation oscillator timing circuit 16. The input circuit of timer module TM1 is the input circuit of NOR circuit 14 and is connected to the inverse output circuit of its preceding memory module MM1. The output circuit of NOR circuit 14 is connected within timer module TM1 to the input circuit of timing circuit 16. The output circuit of timer module TM1 is the output circuit of timing circuit 16 and is connected to an input circuit of memory module MM2. The timing circuit 16 within each of the timer modules TM1 through TM4 is adjustable so that a different predetermined period of time, as desired, may be timed by the timer modules TM1 through TM4.

Tmfiic controller operation The operation of the trafiic controller illustrated in FIGURE 1 commences upon closure of switch S1 which applies B+ positive potential, a 1 signal, to an input circuit of NOR circuit 10 of memory module MM1, which becomes energized. Thus, a 0 signal will be present on the output circuit of NOR circuit 10 (inverse output circuit of memory module MM1), which signal is applied to an input circuit of NOR circuit 12 (inverse input circuit of memory module MM1). A 1 signal will be present on all of the output circuits of memory module MM1 so that a 1 signal will be applied to relay driver module DM1, causing the main street go signal MSG to become energized to display a go interval to main street traflic flow. A 1 signal will be applied within the memory module MM1 from the output circuit of NOR circuit 12 to the input circuit of NOR circuit 10 for maintaining memory module MM1 energized even if switch S1 is opened. Also, a 1 signal will be applied from the output circuit of memory module MM1 to the inverse input circuit of memory module MM4 for de-energizing the memory module MM4. When memory module MM4 is de-energized, a 0 signal will be present at all of its output circuits, deactivating relay driver module DM4 and thereby causing the cross street caution signal CSC to be de-energized. A 0 signal will be applied from an inverse output circuit of memory module MM1 to the input circuit of NOR circuit- 14 of timer module TM1. Thus, a 1 signal will be present on the output circuit of NOR circuit 14 of timer module TM1, which signal will be applied within the module to the input circuit of timing circuit 16. After a predetermined period of time, a 1 output signal will be present on the output circuit of timing circuit 16, which signal will be applied to the input circuit of memory module MM2, which becomes energized. Memory module MM2 will, in turn, have a 1 output signal present on its output circuits, and a 1 signal is applied therefrom to an inverse input circuit of memory module MM1 to de-energize memory module MM1. This causes a 0 signal to be applied to relay driver module DM1, which becomes deactivated and thereby causes main street go signal MSG to be deenergized.

Memory module MM2 also applies a 1 output signal to relay driver module DMZ, which becomes activated to cause main street caution signal MSC to be energized so that a caution interval is displayed to main street trafiic flow. A 0 output signal will be present on the inverse output circuits of memory module MM2 and one of the inverse output circuits applies a 0 signal to the input circuit of timer module TM2. Timer module TM2, in a manner similar to that as described above with respect to timer module TM1, serves after a predetermined period of time to apply a 1 output signal to an input circuit of memory module MM3, which becomes energized. A 1 output signal will be present on all of the output circuits of memory module MM3, and a 1 signal is applied from one of the output circuits to an inverse input circuit of memory module MM2, thereby de-energizing memory module MM2 and in turn deactivating relay driver module DM2 to cause the main street caution signal MSC to be de-energized.

Memory module MM3 also applies a 1 output signal to relay driver module DM3 to cause cross street go signal CSG to be energized, thereby displaying a go signal to cross street trafiic flow. Memory module MM3 also applies a 0 signal from its inverse output to the input circuit of timer module TM3 which after a predetermined period of time serves to apply a 1 output signal to an input circuit of memory module MM4, which becomes energized. Memory module MM4 when energized will apply a 1 output signal from one of its output circuits to an inverse input circuit of memory module MM3, thereby tie-energizing memory module MM3 and, in turn, deactivating relay driver module DM3 to cause the cross street go signal CSG to be de-energized.

Memory module MM4 also applies a 1 output signal from one of its output circuits to relay driver module DM4 to cause the cross street caution signal CSC to be energized, thereby displaying a caution interval to cross street traflic flow. Memory module MM4 also applies a 0 signal from its inverse output circuit to the input circuit of timer module TM4, which, after a predetermined period of time, serves to apply a 1 output signal to an input circuit of memory module MM1, which becomes energized. Memory module MM1, when energized, applies a 1 output signal from its output circuit to the inverse input circuit of memory module MM4, thereby de-energizing memory module MM4 and, in turn, deactivating relay driver module DM4 to cause the cross street caution signal CSC to be de-energized. The trafiic controller has now completed one cycle of operation and all succeeding cycles of operation are substantially the same as described above.

Load relay control circuit Relay driver modules DM1 through DM4 are substantially identical and trafiic signals MSG, MSC, CSG, and CSC are substantially identical and, accordingly, only relay driver module DM1 and trafiic signal MSG will be described in detail. Referring now to FIGURE 2, which schematically illustrates relay driver module DM1 and main street go traffic signal MSG, module DM1 generally includes a resistor transistor logic OR circuit 18, and a static trigger switch, preferably taking the form, as shown, of a silicon controlled rectifier 20. Main street go trafiic signal MSG generally includes a signal lamp 22, a load relay 24, and a rectifier circuit 26 connected to a source of alternating current voltage 28, such as 115 volt line voltage.

OR circuit 18 includes a NPN transistor 30 having a collector 32 connected to a B+ voltage supply source through a resistor 34, an emitter 36 connected to ground G through a load resistor 38, and a base 40. Base 40 is connected to an output circuit of memorymodnle MM1 through a current limiting resistor 42 and is also connected to a B voltage supply source through a bias resistor 44. The OR circuit 18 serves as a source of forwarding biasing signals for the silicon controlled rectifier 20. Rectifier has an input circuit taken between its cathode 46, which is connected directly to ground G,

and its gate 48, which is connected to the junction of emitter 36 of transistor 30 and load resistor 38, and an output circuit taken between ground G and its anode 50.

Load relay 24 includes a load relay coil 52 and a pair of normally open relay contacts 54, including a stationary contact 56 and a movable contact 58 which serves to mechanically and electrically engage contact 56 when coil 52 is energized. Relay coil 52, which has a voltage surge suppressor, power factor correcting capacitor 60 and a current limiting resistor 62 connected together in series across the coil, is connected between anode 50 of silicon controlled rectifier 20 and rectifier circuit 26. Relay contacts 56 and 58 connect lamp 22 directly across voltage source 28. A primary winding 64 of a transformer 66 is also directly connected across the voltage source 28. The transformer 66 is also provided with a secondary winding 68 having a mid-tap 70 connected directly to ground G and a pair of output terminals 72 and 74. Transformer 66 is preferably a step-down transformer having a primary to secondary winding ratio of 3% to 1 so that, for example, with source 28 being a 115 volt line voltage the output voltage taken from ground G to either output terminal 72 or 74 will be on the order of 30 volts.

Further in accordance with the present invention, the rectifier circuit 26 takes the form of a first pair of diodes 76 and 80 and a second pair of diodes 82 and 84, with the diodes of each pair being connected together in parallel with the anodes of diodes 76 and 80 being connected in common to output terminal 72 and the anodes of diodes 82 and 84 being connetced in common to output terminal 74. The cathodes of diodes 76, 80, 82 and 84 are connected in common at a junction point 86 connected to one side of load relay coil 52.

Operation of load relay control circuit Memory module MM1 will not be energized when its associated timer module TMl is not performing a timing operation and, thus, a ground potential signal, i.e., a 0 signal, will be applied from the output circuit of memory module MM1 to the base 40 of transistor 30 in relay driver module DM1. Thus, the resultant potential appearing on base 40 of transistor 30 with respect to that on emitter 36 will be a negative potential taken from the B voltage supply source through bias resistor 44. Accordingly, transistor 30 will be reversed biased and nonconductive presenting a very high impedance to current flow therethrough, and the potential applied to gate 48 of silicon controlled rectifier 20 will be essentially that of ground potential, whereby rectifier 20 will be maintained reverse biased. Essentially no current will flow from the secondary winding 68 of transformer 66 through load relay coil 52 and the anode to cathode circuit of rectifier 20 to ground G and, hence, coil 52 will remain de-energized and lamp 22 of the main street go signal MSG will be de-energized.

When memory module MM1 is energized and timer module TMl is performing a timing operation, a positive potential, i.e., a 1 signal, will be applied from the output circuit of memory module MM1 to the base 40 of transistor 30 in load relay driver module DM1. This positive potential is taken from a B;+ voltage supply source through current limiting resistor 42, which exhibits a resistance approximately /3 of that of bias resistor 44. Accordingly, the resultant potential on base 40 will be a positive potential with respect to that on emitter 36 and transistor 30 will be forward biased and conductive. When transistor 30 is forward biased it will present a low impedance to current flow therethrough and, hence, current will flow from the B+ voltage supply source through resistor 34 and thence through the collector 32 to emitter 36, and through load resistor 38 to ground G. A positive voltage with respect to ground G will be developed across load resistor 38, which potential when applied to gate 48 of rectifier 20 is sufficient to forward bias the rectifier. So long as rectifier 20' is maintained for- Ward biased by the potential applied to its gate 48, current will flow through its anode to cathode circuit whenever the potential appearing on anode 50 is positive with respect to that appearng on cathode 46. When current flows through rectifier 20, relay coil 52 will be energized, causing movable contact 58 to move upwardly, as viewed in FIGURE 2, to mechanically and electrically engage contact 56, whereby current will flow from alternating current voltage source 28 through lamp 22 which will 7 become energized and display a go signal to main street traffic flow.

Reference is now made to the waveforms illustrated in FIGURES 3A through 3E. The voltage of alternating current voltage source 28 has a sinusoidal waveform, as illustrated by waveform V in FIGURE 3A. The rectifier circuit 26 .serves to fully rectify the alternating voltage applied to it through the secondary winding 68 of transformer 66 to obtain a train of positive voltage pulses, as illustrated by the waveform V in FIGURE 33. The transistor 30 in relay driver module DM1 may become forward biased and conductive at any particular instant in time with respect to the alternating current volt-age obained from source 28 and, for example, may become conductive during a negative half cycle of the alternating voltage V of source 28 to develop a voltage across load resistor 38, as illustrated by waveform V in FIGURE 3C. Since, however, in accordance with the present invention the potential appearing on anode 50 with respect to-cathode 46 of rectifier 20 is a full wave pulsating positive voltage V taken between ground G and junction point 86 of rectifier 26, current will then commence flowing through the anode to cathode circuit of rectifier 20 and relay coil 52 will become energized, as illustrated by voltage waveform V in FIGURE 3D. Thus, contacts 56 and 58 will become closed and current will commence flowing through contacts 56 and 58 during the negative half cycle of the alternating current voltage of source 28 to energize lamp 22, as illustrated by voltage waveform V in FIGURE 3E.

Since the silicon controlled rectifier 20 will commence conducting current during either the positive or negative alternations of the alternating voltage of source 28, the relay coil 52 may become energized at random with respect to the alternating voltage of source 28. During the operation of relay 24, its contacts 56- and 58 will on the average switch an even number of times on the positive and negative alternations of the alternating voltage of source 28 so that the tendency of contact material to migrate to one contact and for the other contact to become pitted will be substanially eliminated, resulting in a long operating lifetime of contacts 56 and 58.

In accordance with a preferred embodiment of the invention, the values and types of various components illustrated in FIGURE 2 are found in TABLE I.

TABLE I Component Component: value or type NPN transistor 30 2N2924. Resistor 34 lkilohm. Silicon controlled rectifier 20 2N3528. Resistor 42 33 kilohms. Resistor 44 110 kilohms. Resistor 38 220 ohms. Capacitor 60 microfarads. Resistor 62 47 ohms. Diodes 76, 80, 82, 84 IN4001. Bl. voltage supply source +20'volts direct current. B- voltage supply source 20 volts direct current.

Although the invention has been shown in connection with a preferred embodiment, it will be readily apparent to those skilled in the art that various changes in form and arrangement of parts may be made to suit requirements without departing from the spirit and scope of the invention as defined by the appended claims.

I claim:

1. A traffic controller forcontrolling the operation of trafiic signal lamps for displaying go and caution intervals to main street and cross street traffic flow at a trafiic flow intersection, comprising:

a plurality of static, solid state logic memory means one each for main street and cross street go and caution intervals, each said memory means having an input and an output and having a first condition and a second condition;

a like plurality of static, solid state timing means each coupling the output of a preceding memory means with the input of a succeeding memory means for timing the first condition of said preceding memory means for a predetermined period of time and then actuating said succeeding memory means to its said first condition;

coupling means for coupling the output of each said succeeding memory means with the input of a said preceding memory means for actuating said preceding memory means to its said second condition when the said succeeding memory means is in its first condition;

a load relay for each said signal lamp and having a relay coil and a pair of contacts adapted when closed to connect said lamp with a source of alternating current voltage; and,

,a load relay control circuit for each load relay and including an electronic control device having an input circuit connected to a source of forward biasing signals and an output circuit connected to said voltage source through said relay coil and conductive when voltage of a particular polarity is applied from said voltage source to its output circuit, and means for developing a fully rectified pulsating voltage of said particular polarity from said voltage source and applying said rectified voltage to the output circuit of said device through said coil so that when a forward biasing signal is applied to said output circuit the said device will commence conduction so that current will flow therethrough to energize said coil.

2. A traflic controller as set forth in claim 1, wherein said source of forward biasing signals of each control circuit is an OR circuit having an input circuit connected to an output of one of said memory means for applying a forward biasing signal to a said control device when said one memory means is in its first condition.

3. A traffic controller as set forth in claim 2, wherein said OR circuit and said electronic control device respectively take the form of a resistor transistor logic OR circuit and a silicon controlled rectifier connected together in such a manner that said rectifier will become forward biased when the transistor of said OR circuit becomes forward biased.

4. A traffic controller as set forth in claim 3, wherein said rectifier has an anode connected to one side of said coil and said rectifying means is connected to the other side of said coil and develops a fully rectified pulsating positive voltage from said voltage source for application to said anode.

5. A trafiic control system including:

main street go and caution lamps and cross street go and caution lamps;

solid state means for sequentially energizing said main street go lamp, said main street caution lamp, said cross street go lamp and said cross street caution p;

solid state timing means for controlling the time duration that each said lamp is energized;

a load relay for each lamp, each said relay including a relay coil and a pair of normally open contacts adapted when closed to connect said lamp with an alternating current voltage source;

a load relay control circuit for each said load relay and including:

solid state electronic control means having first,

second and control elements, and which commences to conduct current only when a forward biasing signal is applied to said control electrode at point in time when a direct current potential of a particular polarity is applied to said first electrode,

gating means for applying a said forward biasing signal to said control electrode,

full wave rectifying means adapted to be coupled to said alternating current voltage source for said relay coil coupling said rectifying means with said first electrode for applying said direct current potential signal to said first electrode, whereby said relay may be energized during either the negative or positive half cycle of said alternating current voltage source.

No references cited.

providing a direct current potential of said par- 10 NEIL READ Pfimary Examiner ticular polarity,

THOMAS B. HABECKER, Examiner. 

1. A TRAFFIC CONTROLLER FOR CONTROLLING THE OPERATION OF TRAFFIC SIGNAL LAMPS FOR DISPLAYING GO AND CAUTION INTERVALS TO MAIN STREET AND CROSS STREET TRAFFIC FLOW AT A TRAFFIC FLOW INTERSECTION, COMPRISING: A PLURALITY OF STATIC, SOLID STATE LOGIC MEMORY MEANS ONE EACH FOR MAIN STREET AND CROSS STREET GO AND CAUTION INTERVALS, EACH SAID MEMORY HAVING AN INPUT AND AN OUTPUT AND HAVING A FIRST CONDITION AND A SECOND CONDITION; A LIKE PLURALITY OF STATIC, SOLID STATE TIMING MEANS EACH COUPLING THE OUTPUT OF A PRECEDING MEMORY MEANS WITH THE INPUT OF A SUCCEEDING MEMORY MEANS FOR TIMING THE FIRST CONDITION OF SAID PRECEDING MEMORY MEANS FOR A PREDETERMINED PERIOD OF TIME AND THEN ACTUATING SAID SUCCEEDING MEANS TO ITS SAID FIRST CONDITION; COUPLING MEANS FOR COUPLING THE OUTPUT OF EACH SAID SUCCEEDING MEMORY MEANS WITH THE INPUT OF A SAID PRECEDING MEMORY MEANS FOR ACTUATING SAID PRECEDING MEMORY MEANS TO ITS SAID SECOND CONDITION WHEN THE SAID SUCCEEDING MEMORY MEANS IS IN ITS FIRST CONDITION; A LOAD RELAY FOR EACH SAID SIGNAL LAMP AND HAVING A RELAY COIL AND A PAIR OF CONTACTS ADAPTED WHEN CLOSED TO CONNECT SAID LAMP WITH A SOURCE OF ALTERNATING CURRENT VOLTAGE; AND, A LOAD RELAY CONTROL CIRCUIT FOR EACH LOAD RELAY AND INCLUDING AN ELECTRONIC CONTROL DEVICE HAVING AN INPUT CIRCUIT CONNECTED TO A SOURCE OF FORWARD BIASING SIGNALS AND AN OUTPUT CIRCUIT CONNECTED TO SAID VOLTAGE SOURCE THROUGH SAID RELAY COIL AND CONDUCTIVE WHEN VOLTAGE OF A PARTICULAR POLARITY IS APPLIED FROM SAID VOLTAGE SOURCE TO ITS OUTPUT CIRCUIT, AND MEANS FOR DEVELOPING A FULLY RECTIFIED PULSATING VOLTAGE OF SAID PARTICULAR POLARITY FROM SAID VOLTAGE SOURCE AND APPLYING SAID RECTIFIED VOLTAGE TO THE OUTPUT CIRCUIT OF SAID DEVICE THROUGH SAID COIL SO THAT EVEN A FORWARD BIASING SIGNAL IS APPLIED TO SAID OUTPUT CIRCUIT THE SAID DEVICE WILL COMMENCE CONDUCTION SO THAT CURRENT WILL FLOW THERETHROUGH TO ENERGIZE SAID COIL. 